Hello,

I'm looking for a hardware to install a Linux as Router OS does not include some feeatures (1-wire, some of openvpn features, and generally cannot make use of this cool serial port it includes). The hardware needs to be cheapest as possible, because it has to be utilized in many simple places.

But meanwhile, I've checked linux MIPS packages availability and it seems there is partial support or there are missing packages I need. So the question is - which platform can I choose to feel safe to install linux in it?

I would prefer ARM machine, but AFAIK MikroTik doesn't produce one. 4 curiousity, why so focused on MIPS in low end (CCR, RB 800 are based on PPS, 1100+ I don't know).

Or I'm wrong and should I read opnewrt site more?

thanks!

MikroTik only produces MIPS-BE and PPC based devices. We have no ARM devices, and don't plan to make any in the near future.

Thank you,

MIPS/PPC is possibly sufficient, I just wondered with what do I start.

Is there any official (wiki?) article regarding for example boot process or system features / manual for a device (411 preferably)? I mostly mean the necessary things to store & boot kernel and to include all devices 411 provides. So I also need kernel config.

Thanks.

Use the METARouter feature.

you can go OpenWRT path where all of this is already done for you. just tailor system as you like.

as mentioned here, you can go metarouter path and run other linux on top of RouterOS (with latest patches i have yet to see metarouter doing something wrong, ir starts normally)

Metarouter? nooo! it's still very cool, but anyway its a virtual machine (KVM on MIPS? or a container? but it boots a kernel, so rather a VM? yes?)

I would rather compile the distro by myself, it should take up to one week to have initial release. I have some experience and would use squashfs and - if MIPS supports any containers - deduplication of data shared on different containers (internal feature of Squashfs) . Previously, I've used this in OpenVZ by mount -o bind with RO. This allowed several different containers on 2GB CF and very low memory usage.

Still this is mostly the same as OpenWRT and others does. Some RAM and "ROM" here and there.

Anyway, hardware is important, kernel needs to be perfect and toolchain for cross compilation on x86 set. That is why I ask for initial information, how to begin tinkering with the hardware.

Thank you.

Janisk, this is off topic but I have RB433 at home and metarouter kills 100% of CPU you can have access to it, if you like.

i cannot give you any details, check out what OpenWRT guys are doing to set up environment.

about offopic - what you are running there and what tasks it perform. because getting 100% cpu usage is not that hard as it might seem on any hardware.

Well, I just start it (metarouter with RouterOS)

weird never seen such behaviour unless memory pool allocated was too small, eg. default 16MB. 32MB for guest would be more reasonable.

Never say never.... krrkrrrr
ARM, Imagination Technologies Take Over MIPS

its "simple":
MIPS more fool-proof. both firmware/hardware/software developers was hard to break it[with excptly specified code/data pages doing stack overflow wasn't as trivial task as in x86, for example], even intentionally, also it hardened against lazy programming a bit, thus consistent/predictible dataflow - easier.
also many if not ALL simply forgot that MIPS, along with Berkley[presently evolved(ospfied)into Sparc] - oldest RISC architectures, aside PPC.
many features arch got earlier than others do. they got[along with Inmos chips]decent built-in FP unit[some commercially-unsucessful FP units of ancient top-end MIPS FP units - out-gunned only by Cray HW], SIMD, DMA-based/singe int periperal[acorn/amiga-style], decent/impressive Out-of-Order Exec/Sheduler/Decoder/Fetch[despite troubles w/implementing this on arch], decent memory controller, MIPS was actually first[1991?] before Dec Alpha[1992] 64-bit commercially successful chip, until AMD rolled AM64 and etc and etc.
precently MIPS only lack most fat/hot[in terms of transistors/heat]portions, ie OoO exec, fast/wide Floating point unit, probably augmented by DSP/GPU, like in promised Q in Snapdragon 5[transparent offloading FP and partially INT/GPR/ALU workload to GPU w/o re-code/re-compile SW] and future AMD chips.
future Tilera chips will be based on new MIPS arch and become, tnx to both optical internal bus and advanced interconnect[lightweight(in terms of transistors count), but fast/flexible], new 64-bit arch with improved sheduler/exec - something WAY more interesting than present MIPS chips.
presently Tilera chips only limited by C/C++ software engineers/software developers mentality/approach/values. i wonder what happen when/if they adopt Erlang for example. those pesky semaphores/mutexes, shedulers, heap and other lazy/redundant/insecure/not scalable stuff from 50yrs old Unix/C era - heavily bottlenecking that way.


recent MIPS Aptiv cores had COOL Out-of-Order[but quite simplified/lightweight, which is reasonable]sheduler/exec/fetch, nice DSP/FPU, improved memory controller and internal interconnect[which isn't as powerful as Tilera chips, but can help you to make at least 4xcore and 8xcore CPU/controller/ic w/o serious engineering investments] and etc and etc.
ie, MIPS was return back. to basics.
presently in China and India - MAJORITY of ultra-affordable tablets/UMPC/phones/netbooks with price-range from $20 to $70 was MIPS-based.
you can't see such stuff x86-based[even on VIA].
even ARM chips can't do it[fit low-end devices/markets needs].
compare benchmarking of 74Kf and 1074Kf[MP 74K derrivative/model]and ProAptiv and InterAptiv chips on internet for reference.
thats stuff could actually make MIPS handy for destop use AGAIN, aswell as for HPC[just like FR-V and ARM already by Fujitsu and BSC,Samsung respectively].
which actually nearly employed in China for example[https://en.wikipedia.org/wiki/Loongson],aside microcontrollers for undustrial[including military]use.
you can get simple/short datasheets Directly from MIPS[after registration]
https://www.mips.com/products/processor ... ips32-74k/
IMO, 1.5Ghz RISC chips[15 stage pipeline! way shorter than others. mean - LESS latency!] on 40nm wafer - sound impressive[as perform].
https://www.mips.com/products/processor ... /proaptiv/
http://www.anandtech.com/show/5826/mips ... tiv-series
that beated ARM-A15 into dust in benchmarking/workload !!